Physically-Adaptive Computing via Introspection and Self-Optimization in Reconfigurable Systems.

Digital electronic systems typically must compute precise and deterministic results, but in principle have flexibility in how they compute. Despite the potential flexibility, the overriding paradigm for more than 50 years has been based on fixed, non-adaptive inte-grated circuits. This one-size-fits-all approach is rapidly losing effectiveness now that technology is advancing into the nanoscale. Physical variation and uncertainty in com-ponent behavior are emerging as fundamental constraints and leading to increasingly sub-optimal fault rates, power consumption, chip costs, and lifetimes. This dissertation pro-poses methods of physically-adaptive computing (PAC), in which reconfigurable elec-tronic systems sense and learn their own physical parameters and adapt with fine granu-larity in the field, leading to higher reliability and efficiency. We formulate the PAC problem and provide a conceptual framework built around two major themes: introspection and self-optimization. We investigate how systems can efficiently acquire useful information about their physical state and related parameters, and how systems can feasibly re-implement their designs on-the-fly using the information learned. We study the role not only of self-adaptation—where the above two tasks are performed by an adaptive system itself—but also of assisted adaptation using a remote server or peer. We introduce low-cost methods for sensing regional variations in a system, including a flexible, ultra-compact sensor that can be embedded in an application and implemented on field-programmable gate arrays (FPGAs). An array of such sensors, with only 1% to-tal overhead, can be employed to gain useful information about circuit delays, voltage noise, and even leakage variations. We present complementary methods of regional self-optimization, such as finding a design alternative that best fits a given system region. We propose a novel approach to characterizing local, uncorrelated variations. Through in-system emulation of noise, previously hidden variations in transient fault sus-ceptibility are uncovered. Correspondingly, we demonstrate practical methods of self-optimization, such as local re-placement, informed by the introspection data. Forms of physically-adaptive computing are strongly needed in areas such as com-munications infrastructure, data centers, and space systems. This dissertation contributes practical methods for improving PAC costs and benefits, and promotes a vision of re-sourceful, dependable digital systems at unimaginably-fine physical scales.Ph.D.Computer Science & EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/78922/1/kzick_1.pd

Exploring More-Coherent Quantum Annealing

In the quest to reboot computing, quantum annealing (QA) is an interesting candidate for a new capability. While it has not demonstrated an advantage over classical computing on a real-world application, many important regions of the QA design space have yet to be explored. In IARPA's Quantum Enhanced Optimization (QEO) program, we have opened some new lines of inquiry to get to the heart of QA, and are designing testbed superconducting circuits and conducting key experiments. In this paper, we discuss recent experimental progress related to one of the key design dimensions: qubit coherence. Using MIT Lincoln Laboratory's qubit fabrication process and extending recent progress in flux qubits, we are implementing and measuring QA-capable flux qubits. Achieving high coherence in a QA context presents significant new engineering challenges. We report on techniques and preliminary measurement results addressing two of the challenges: crosstalk calibration and qubit readout. This groundwork enables exploration of other promising features and provides a path to understanding the physics and the viability of quantum annealing as a computing resource.Comment: 7 pages, 3 figures. Accepted by the 2018 IEEE International Conference on Rebooting Computing (ICRC

Anneal-path correction in flux qubits

Quantum annealers require accurate control and optimized operation schemes to reduce noise levels, in order to eventually demonstrate a computational advantage over classical algorithms. We study a high coherence four-junction capacitively shunted flux qubit (CSFQ), using dispersive measurements to extract system parameters and model the device. Josephson junction asymmetry inherent to the device causes a deleterious nonlinear cross-talk when annealing the qubit. We implement a nonlinear annealing path to correct the asymmetry in-situ, resulting in a substantial increase in the probability of the qubit being in the correct state given an applied flux bias. We also confirm the multi-level structure of our CSFQ circuit model by annealing it through small spectral gaps and observing quantum signatures of energy level crossings. Our results demonstrate an anneal-path correction scheme designed and implemented to improve control accuracy for high-coherence and high-control quantum annealers, which leads to an enhancement of success probability in annealing protocols.Comment: v2 published versio

26th Annual Computational Neuroscience Meeting (CNS*2017): Part 3 - Meeting Abstracts - Antwerp, Belgium. 15–20 July 2017

This work was produced as part of the activities of FAPESP Research,\ud Disseminations and Innovation Center for Neuromathematics (grant\ud 2013/07699-0, S. Paulo Research Foundation). NLK is supported by a\ud FAPESP postdoctoral fellowship (grant 2016/03855-5). ACR is partially\ud supported by a CNPq fellowship (grant 306251/2014-0)

On-Line Sensing for Healthier FPGA Systems

Electronic systems increasingly suffer from component variation, thermal hotspots, uneven wearout, and other subtle physical phenomena. Systems based on FPGAs have unique opportunities for adapting to such effects. Required, however, is a low-cost, fine-grained method for sensing physical parameters. This paper presents an approach to on-line sensing that includes a compact multi-use sensor implemented in reconfigurable logic, methods for instrumenting an application, and enhanced measurement procedures. The sensor utilizes a highly-efficient counter and improved ring oscillator, and requires just 8 LUTs. We describe how to measure variations in delay, static power, dynamic power, and temperature. We demonstrate the proposed approach with an experimental system based on a Virtex-5. The system is instrumented with over 100 sensors with a total overhead of only 1.3%. Results from thermally-controlled experiments provide some surprising insights and illustrate the power of the approach. On-line sensing can help open the door to physically-adaptive computing, including fine-grained power, reliability, and health management schemes for FPGA-based systems

Self-Test and Adaptation for Random Variations in Reliability

Abstract—Random physical variations and noise are growing challenges for advanced electronic systems. Field programmable systems can, in principle, adapt to these phenomena, but two main problems must be addressed: how to efficiently characterize random variations and how to perform subsequent optimization. This paper addresses both of these questions. First, an approach to self-test is presented that uses on-chip noise emulation to quickly characterize some of the hidden variations in latches. Our noise-injection experiments demonstrate that there can be significant spreads in latch reliability even with current 65nm field-programmable gate arrays (FPGAs). We detected coefficients of variation as high as 77%. Second, we propose an approach to self-optimization using local resource swapping. Experiments on two FPGAs show improvements in mean-time-between-failures (MTBF) of up to 60%. Keywords-self-adaptation; self-test; self-optimization; variations; transient faults; FPGAs; reconfigurable computing I

On-line characterization and reconfiguration for single event upset variations

Abstract- The amount of physical variation among electronic components on a die is increasing rapidly. There is a need for a better understanding of variations in transient fault susceptibility, and for methods of on-line adaptation to such variations. We address three key research questions in this area. First, we investigate accelerated characterization of individual latch susceptibilities. We find that on the order of 10 upsets per latch must be observed for variations to be adequately characterized. Second, we propose a method of on-line hardware reconfiguration using incremental place-and-route on FPGAs. Surprisingly, we find that highly localized place-and-route changes (e.g. restricted to groups of 8 flip-flops) are sufficient for realizing most of the possible benefits. Lastly, we quantify potential improvements in system-level soft error rates via Monte Carlo simulation experiments. The study highlights both what is required for and what can be gained by on-line adaptation. A I

Skalen und Indizes

In der sozialwissenschaftlichen Literatur existiert keine einheitliche Definition, was unter Index oder Indexbildung subsumiert werden kann und ob und wie sich Indexbildung von Skalierungsverfahren abgrenzt. Diese fehlende definitorische Eindeutigkeit entspringt nicht zuletzt der Frage, ob Indizes auch als Instrumente zur Messung sozialwissenschaftlicher Konzepte bezeichnet werden dürfen (Diekmann 2009: 230ff.)